1. Technical Field
The present invention relates to a system and method for analyzing software performance without requiring hardware. More particularly, the present invention relates to a system and method for using assembly code to generate a performance graph that represents an instruction's execution progress as it relates to a program's actual instruction sequence.
2. Description of the Related Art
Software designers are typically faced with the problem of accurately analyzing software performance and efficiency, whether hardware (e.g. a processor) is available or not. When the hardware is available, a typical software measurement technique is to run the software program on the hardware, and sampling the program counter's location at periodic intervals. After the program finishes, the samples may be drawn on a chart to assess software performance. However, this sampling technique only obtains one data point per interval. Thus, if the sampling interval is too large, much of the program run-time is effectively ignored. Conversely, if the sampling interval is too small, the act of tracing the program will itself affect the program's performance. In addition, both of these techniques only provide a fairly broad overview of the program's performance.
When the hardware is in development and, therefore, not available, the above performance measurement technique is not possible. One option is to use a simulator, but a challenge found is that simulators are too slow and inaccurate to measure a program's performance based upon actual hardware, which thus makes it difficult to accurately assess a program's actual efficiency. This is an especially critical problem for hardware compiler developers because they have no simple way of determining compiler-generated assembly code quality.
Furthermore, a challenge found is that processors themselves are becoming increasingly complicated. In modern processors, each hardware instruction has its own characteristics that affect performance, including multiple pipes, multiple-instruction issue, dependencies, instruction-pairing, latency, instruction location, and setup. Thus, measuring a program's performance before hardware becomes available is virtually impossible, and when hardware is available, only a broad overview is obtained.
What is needed, therefore, is a system and method to accurately assess instruction-level software performance regardless of hardware availability.